Semiconductor devices and integrated circuits are typically manufactured on a single semiconductor wafer. The dies of the wafer may be processed and packaged with other semiconductor devices or dies at the wafer level, and various technologies have been developed for the wafer level packaging. Currently, integrated fan-out packages are becoming increasingly popular for their compactness. The improved routing capability and reliability provided by the integrated fan-out packages are key factors for future packages, where the planarization of the reconstitution wafer has greatly impact on the formation of a redistribution layer.